Configurable Hardware Architectures for Frequency Diverse Target Detection By

Ultrasonic imaging has applications in many industries, such as non destructive testing, medical imaging, and industrial applications. Previous research into ultrasonic imaging has focused on offline processing of echo data. A topic of increasing interest is real-time processing of ultrasonic data. Due to the microstructure of materials the echo signal contains a high amount of clutter noise. In order to achieve target detection it is necessary to filter this clutter noise. Split Spectrum Processing (SSP) has been demonstrated to excel at filtering of clutter noise. While the SSP algorithm is able to achieve excellent filtering performance it does so at a large computational complexity. In order to produce a portable real time system the restrictions on processing time and computational complexity must be overcome. The system-on-a-chip (SOC) methodology is one such technique to achieve this. SOC attempts to combine all system components on a single device to provide benefits in performance and integration. This paper will present two unique SOC based architectures for achieving real-time SSP ultrasonic target detection. These two architectures will be design, implemented, and tested. Discussion of the issues of implementation and performance of the designs will be presented. The goal of this paper is to explore and quantify the issues surrounding a reconfigurable hardware implementation for ultrasonic frequency diverse target detection.